11/14/07 - A paper and presentation from HLDVT 07,   High Level Design Validation and Test Workshop 2007, on November 7-8, 2007 at Irvine, CA.

Paper:  “Coverage-directed test generation through automatic constraint extraction“
by Onur Guzey and Li-C. Wang, University of California Santa Barbara

Presentation: “Post-Silicon Verification Methodology on Sun's UltraSPARC T2 Processor“
by Jai Kumar, Verification Technologist, Catherine Ahlschlager, Manager, Formal Verification
and Peter Isberg, Manager, Test Generation Technologies, Sun Microsystems