CMT Whitepaper

This white paper highlights the technical benefits Sun's chip multithreading (CMT) UltraSPARC T2 processor delivers to multithreaded applications, and provides detailed examples of significant performance gains in three application workloads: telco, cryptography, and string searching.

White Paper: Multithreaded Application Acceleration with Chip Multithreading (CMT)

A Power-Efficient High-Throughput 32-Thread SPARC Processor

Written by A. Leon, J. Shin, K. Tam, W. Bryg, F. Schumacher, P. Kongetira, D. Weisner, A. Strong

Thursday, 16 February 2006 17:00

Ana Sonia Leon, Jinuk Luke Shin, Kenway W. Tam, William Bryg, Francis Schumacher, Poonacha Kongetira, David Weisner, Allan Strong IEEE International Solid State Circuit Conference(ISSCC '06), 2006. [Slides]
The 64bit Niagara SPARC processor is designed for power-efficient high-throughput commercial server applications where power, cooling, and space are major concerns. The chip-multithreaded (CMT) architecture achieves high throughput while optimizing performance/watt. Concurrent execution of 32 threads is implemented through 8 symmetrical 4-way multithreaded cores, supported by a high-bandwidth low-latency cache/memory system.

A Power-Efficient High-Throughput 32-Thread SPARC Processor

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