Home arrow Get Informed arrow Publications arrow Presentations arrow DesignCon2007: UltraSPARC Processor Emulation Verification: Getting SW/HW right the first time!

New CMT Whitepaper

White Paper: Multithreaded Application Acceleration with Chip Multithreading (CMT)

This white paper highlights the technical benefits Sun's chip multithreading (CMT) UltraSPARC T2 processor delivers to multithreaded applications, and provides detailed examples of significant performance gains in three application workloads: telco, cryptography, and string searching.

White Paper: Multithreaded Application Acceleration with Chip Multithreading (CMT)

 

DesignCon2007: UltraSPARC Processor Emulation Verification: Getting SW/HW right the first time! PDF Print E-mail
Written by Jai Kumar   
Monday, 29 January 2007

Presentation by Jai Kumar, Verification Technologist from Sun Microsystems at DesignCon 2007, January 29-February 1, 2007, Santa Clara, California.

Abstract: It is now more important than ever to get the product right the first time! And this is no different for the latest-generation CoolThreads UltraSPARC T1 processor. The UltraSPARC T1 processor with up to 32 simultaneous threads, posed a significant verification challenge to get the HW and SW right the first time. This paper describes usage of high-speed emulation platforms to verify RTL using directed and random tests and verify firmware and Solaris OS even before the design taped out. To reduce time to market, I will show techniques on "pulling-in" many post-SI bring-up tasks, even design tape-out.

Presentation:UltraSPARC Processor Emulation Verification: Getting SW/HW right the first time!"

Comments (0)add comment

Write comment

security image
Write the displayed characters


busy
 
< Prev   Next >
Powered By Page_Cache by Ircmaxell
Generated in 0.332166910172 Seconds