CMT Whitepaper

This white paper highlights the technical benefits Sun's chip multithreading (CMT) UltraSPARC T2 processor delivers to multithreaded applications, and provides detailed examples of significant performance gains in three application workloads: telco, cryptography, and string searching.

White Paper: Multithreaded Application Acceleration with Chip Multithreading (CMT)

RAMP Retreat: OpenSPARC - Xilinx Collaboration

Written by Durgam Vahia and Paul Hartke

Tuesday, 09 January 2007 18:00

Sun OpenSPARC team, together with Xilinx, presented the current status of their attempt to port OpenSPARC T1 core on FPGAs at RAMP workshop (http://ramp.eecs.berkeley.edu) at University of California at Berkeley on January 10-12, 2007.
Research Accelerator for Multiple Processors (RAMP) is a joint effort among six Universities (Berkeley, MIT, Stanford, CMU, Austin and UWash) led by Professor David Patterson to build an emulation infrastructure for future research in parallel Architecture and Programming. The outline of the talk included a quick primer on OpenSPARC T1, optimizations for the FPGA port, initial results with Xilinx Virtex4 technology and system integration of T1 on Xilinx ML411 board.

Presentation: OpenSPARC - Xilinx Collaboration

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