Sun OpenSPARC team, together with Xilinx, presented the current status of the port OpenSPARC T1 core on FPGAs at RAMP Retreat (http://ramp.eecs.berkeley.edu) on June 13 and 14, 2007.

Research Accelerator for Multiple Processors (RAMP) is a joint effort among six Universities (Berkeley, MIT, Stanford, CMU, Austin and UWash) led by Professor David Patterson to build an emulation infrastructure for future research in parallel Architecture and Programming. The presentation is an update on the status of the  OpenSPARC T1 optimizations for the FPGA port with Xilinx Virtex4 technology and system integration of T1 on Xilinx ML411 board.

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