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This white paper highlights the technical benefits Sun's chip multithreading (CMT) UltraSPARC T2 processor delivers to multithreaded applications, and provides detailed examples of significant performance gains in three application workloads: telco, cryptography, and string searching.

White Paper: Multithreaded Application Acceleration with Chip Multithreading (CMT)

 

MultiCore Expo Japan 2007: Implementing an OpenSPARC T1 system on an FPGA

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Written by Thomas Thatcher   
Wednesday, 31 October 2007 03:00

Abstract: Presentation made at the MultiCore Expo 2007 Japan, on October 31 and November 1, 2007, Tokyo, Japan.

Bio:  Tom Thatcher graduated from Seattle University with a Bachelors Degree in Electrical Engineering. He worked for 2 years for a startup called Seattle Silicon, which made standard cell compilers, and automated place & route tools. He then went back to school, and graduated from the University of Illinois with a Masters Degree. He went to work for Hewlett-Packard in their California Design Center, where he contributed to ASIC designs for HP's very successful laser printers. Following the HP/Agilent split, he transferred to a Networking group in Agilent, where he worked on mixed-signal PHY chips for Ethernet and FibreChannel systems. He joined Sun in September of 2003, where he has been working on formal verification.

 

Presentation:“Implementing an OpenSPARC T1 system on an FPGA“

 

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