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Wednesday, 13 September 2006 07:00 |
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The s1 project
Sun Microsystems' OpenSPARC T1 microprocessor (codename Niagara),
recently released under the GPL license, features 8 SPARC CPU Cores
and several peripherals; the S1 Core takes only one 64-bit SPARC Core
from that design and adds a Wishbone bridge, a reset controller and a
basic interrupt controller, to make it easy for a system engineer to
integrate the design.
Simply RISC S1 Core (codename Sirocco) shares with
the SPARC v9 Core, from which it is derived, the ability to execute
four concurrent threads at the same time; and Operating Systems that
support Sun's microprocessor, such as OpenSolaris and GNU/Linux
distributions (like Ubuntu and Gentoo), will then detect four different
CPUs even if on the chip the CPU core is only one.
Join s1 project.
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