The OpenSPARC T2 processor is based on the UltraSPARC T2 processor, the world's fastest commodity processor with eight cores and eight threads per core.

New Features in Release 1.1 

OpenSPARC T2 Design and Verification Download bundle

• Included Network Interface Unit (NIU) source code in the distribution.
• OpenSPARC T2 System-on-chip (SoC) micro-architecture document has a new chapter on NIU. The document now is also divided in two volumes to reduce the size of the each book.
• Verification and synthesis are now supported on x64 hardware platform running on GNU kernel Linux 2.6 and above
• Simulation environment now also supports Cadence NC-Verilog simulator. It is still required to have Synopsys Vera for the testbench components written in Vera language.

OpenSPARC T2 Architecture and Performance Model Download bundle

• SPARC Architecture Model (SAM) now supports Solaris operating system running on x64 hardware platform
• SAM has new user interface for better usability and more functionality
• Fix Open Boot PROM (OBP) build script for niagara1-hw and niagara2-hw platforms

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