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Arturo Mann proudly announces that he has successfully synthesized the S1 Core on a Xilinx Virtex-4 FPGA device.
The current build_xst
script in the official S1 Core enviroment works with the free (as in
beer) version of Xilinx ISE WebPack, and the default FPGA device
selected by this script is the one embedded in the Xilinx Spartan-3E
Starter Kit: it does not fit the whole S1 Core so the report you'll get
will be as follows:
Arturo Mann proudly announces that he has successfully synthesized the S1 Core on a Xilinx Virtex-4 FPGA device.
The current build_xst
script in the official S1 Core enviroment works with the free (as in
beer) version of Xilinx ISE WebPack, and the default FPGA device
selected by this script is the one embedded in the Xilinx Spartan-3E
Starter Kit: it does not fit the whole S1 Core so the report you'll get
will be as follows: 
But with the commercial version of Xilinx ISE Foundation Arturo was able to select a Virtex-4 LX60 device, obtaining: 
He
was able to complete HDL compilation, synthesis, place-and-route and
obtained a valid bitstream ready to be loaded onto the board.
If you want to test the S1 Core on your FPGA board just change the name of the device following the -p option embedded in the file $S1_ROOT/tools/src/build_xst.cmd before launching the build_xst script.
Learn more...
Go to S1 Core documentation page
Want the design?
Go to the Download Area
Read the original article: http://www.us.design-reuse.com/news/news15704.html
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