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Setting up a SystemVerilog verification environment involves
many steps, but verification consultant Mike Mintz promises to make it
easier with two open-source verification libraries. Called Teal and
Truss, the libraries were previously available for C++ verification
environments.
Setting up a SystemVerilog verification environment involves
many steps, but verification consultant Mike Mintz promises to make it
easier with two open-source verification libraries. Called Teal and
Truss, the libraries were previously available for C++ verification
environments.
Teal and Truss are available for free download at Trusster.com, a web site launched last year when Teal and Truss were first offered for C++ verification.
Mintz launched the site with Robert Ekendahl, principal verification
engineer at Sun Microsystems, after the two wrote a book entitled "Hardware Verification with C++: A Practitioner's Handbook."
Mintz, a former software
engineer, wrote Teal seven years ago on his first verification job.
Truss came about more recently when both Mintz and Ekendahl were
working at Freescale Semiconductor.
Teal is an open-source verification utility that provides the
low-level building blocks needed to build a verification environment.
This includes such things as simulation logging, error reporting,
threading, and memory model management. It has random number generation for users who don't want to use SystemVerilog's randomization capability.
Truss, said Mintz, sits on top of Teal and defines a methodology. "I
have my building blocks, but how do I actually write a test, how do I
build a testbench, who does what?" Mintz said. He likened Truss to a
"dance" that describes how each major component in the system can be
controlled. Truss includes a set of classes that will allow different
tests, bus functional models, generators, and checkers to work as expected. It also has example implementations.
Mintz said that Teal and Truss are "99 percent the same" for
SystemVerilog as they were for C++, although he noted that developing a
generic program block for SystemVerilog was tricky. "I did it and it's
really cool, because now you can have any test run by the same
program," he said. The program block, Mintz said, provides the
connection between Verilog and SystemVerilog.
Mintz likened Truss to the Advanced Verification Methodology (AVM) developed by Mentor Graphics, or the Verification Methodology Manual (VMM)
developed by ARM and Synopsys. The difference? Truss is "100 percent
free with no strings attached," Mintz said, and it runs on both Mentor
and Synopsys simulators.
"AVM and VMM are too complicated," Mintz said. "They try to
start at the lowest level and tell you how to run the lowest level. I
don't do that. I think the need is more toward understanding how we
want the big top-level blocks organized."
Teal and Truss for SystemVerilog work with the Mentor Questa
and Synopsys VCS simulators, and Mintz said he's working with Cadence
Design Systems to bring the capability to that company's NC-Sim
simulator. Meanwhile, Mintz said he's already had "thousands of
downloads" for the original Teal and Truss for C++.
Mintz and Ekhandahl's book was reviewed on line this week by Clive Maxfield of CMP Media's
Programmable Logic DesignLine.
Read the original article: http://www.eetimes.com/news/design/showArticle.jhtml?articleID=197006459
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