EDN: Cadence Expands Reach for Hardware-Assisted Verification

Hardware-based emulators have long been reserved for the most intensive design verification projects, but EDA market leader Cadence Design Systems Inc. is looking to change all that and bring its hardware-based tools to more engineers’ desktops.

Alongside its CDNLive technical forum being held beginning today in San Jose, the EDA giant is unveiling the next generation of its Incisive series of tools used for design acceleration and emulation, called Incisive Design Team Xtreme III.

These tools sit within Cadence’s functional verification platform and have been upgraded with the design and verification engineer in mind – combining the power and speed of hardware-assisted verification with the ease-of-use for simulation-savvy designers.

The Xtreme tools came as part of Cadence’s acquisition of Verisity Inc. in 2005, which had acquired Axis Systems Inc. in 2003, where the technology originated.

Xtreme III systems aim to simplify the move to and from simulation and acceleration engines, integrate verification management and debug environments, and support advanced verification methodologies such as assertion-based and transaction-based acceleration, Cadence explained.

Leveraging the latest semiconductor technology, Xtreme III now boasts twice the performance of the company's previous generation Xtreme Server with 10 to 100,000 times the simulation performance gain, and supporting up to 72 million gates in a single chassis.

User Shrenik Mehta, senior director for front end technologies and the OpenSPARC program at Sun Microsystems confirmed that during the development of its OpenSPARC project, the company experienced double the performance using the Cadence Incisive Xtreme III system over Cadence’s Xtreme Server product.

“We successfully employed Xtreme Server platform on our CoolThreads UltraSPARC T1 processor to run trillions of verification cycles and to boot the Solaris Operating System prior to committing the design to silicon,” Mehta added in a statement.

Xtreme III’s simulation-like, event-driven environment is meant to provide a host of verification process automation capabilities for design teams including integration with Incisive Design Team Manager for plan- and metric-driven closure management, integration with the Incisive SimVision simulation debug environment, and support of SystemVerilog Assertions and SystemVerilog Direct Programming Interface.

In addition, a compatibility mode emulates the Incisive Design Team Simulator and supports its compile scripts. The hot-swap capability between the simulator and the accelerator, VCD-on-Demand, and the inclusion of behavioral language processors help design teams migrate from simulation to Xtreme III systems, Cadence said.

Further, a new concurrent mode allows designers to run their transaction-based acceleration environment with SCE-MI 1.1 approaching maximum emulation speed. The robust verification IP portfolio of the Incisive platform allows Xtreme III system users to access the Incisive Assertion Library, bus-protocol transactors, as well as a library of SpeedBridge rate adapters.

Steve Glaser, corporate VP of marketing for Cadence verification division concluded, “The Xtreme III series was developed specifically to deliver acceleration to a broad set of design engineers by making it easy for them to use the advanced verification methodologies required to reach predictable verification closure.”

Xtreme III systems are offered in two tiers: Xtreme III Desktop is an entry level product that supports simulation, acceleration and targetless emulation, and Xtreme III System that also offers in-circuit emulation capabilities. Both systems can accommodate up to 12 users simultaneously making them the premier acceleration/emulation offering for the entire design team.

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