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This course is created by Synopsys Inc. and is made available from the Synopsys University Program. This package includes design, documentation, and scripts to synthesize OpenSPARC T1 Floating-Point Unit (FPU) using Synopsys Inc, Electronic Design Automation (EDA) tools. Primary goal of this package is to provide students sand-box environment within which they can learn and apply logic synthesis concepts on a real world design example.
This lab requires the following software and libraries:
- Synopsys Design Compiler version B-2008.09 or later
- Synopsys 90nm generic library
- OpenSPARC T1 version 1.6 or later
- Synopsys supported Compute Platform
Download
Register and download the free course materials.
Lab #1
In this lab you will synthesize the Floating-Point Unit (FPU) of the OpenSPARC T1 design. This design is compliant with IEEE 754 standard. It implements a complete SPARC V9 floating-point arithmatic instruction set, including add, substract, compare, multiply, and divide, but excluding square root and quad precision instructions. For more details on the functionality and the implementation of the FPU design, please refer to the document titled “OpenSPARCT1_FPU_Micro_Arch.pdf” under “OpenSPARC_doc” directory.
In this lab you will complete the following tasks:
- Invoke Design Vision
- Setting up Libraries and Search Path
- Read the design into GUI
- Sourcing the timing constraints
- Compile the design with different compile commands with area constraints
After completing lab #1, you should be able to:
- Invoke Design Vision
- Use Design Compiler to synthesize your design
- Successfully apply timing constraints to your design
Lab #2: In this lab you will perform synthesis using area and timing cosntraints. You will use the Floating-Point Unit (FPU) of the OpenSPARC T1 design in this lab. This design is compliant with IEEE 754 standard. It implements a complete SPARC V9 floating-point arithmatic instruction set, including add, substract, compare, multiply, and divide, but excluding square root and quad precision instructions. For more details on the functionality and the implementation of the FPU design, please refer to the document titled “OpenSPARCT1_FPU_Micro_Arch.pdf” under “OpenSPARC_doc” directory. In this lab you will complete the following tasks:
- Create a Design Compiler script file
- Invoke dc_shell
- Synthesize the design using area and timing constraints
After completing lab #2, you should be able to:
- Use Design Compiler to synthesize your design
- Successfully apply area and timing constraints to your design and synthesize your design to meet these constraints
For more Information
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For general information about the OpenSPARC program, visit http://www.opensparc.net
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For specific technical questions related to OpenSPARC, use following forum.
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For general information about the Synopsys University program, visit: http://www.synopsys.com/Community/UniversityProgram/Pages/default.aspx
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For any questions related to Synopsys University Program or for any
technical questions, use the following link: http://www.synopsys.com/cgi-bin/university/contact/req1.cgi
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