ISSCC 2008: A Third-Generation 65nm 16-Core 32-Thread Plus 32-Scout-Thread CMT Comments for ISSCC 2008: A Third-Generation 65nm 16-Core 32-Thread Plus 32-Scout-Thread CMT at http://www.opensparc.net , comment 1 to 1 out of 1 comments http://www.opensparc.net Wed, 27 Aug 2008 18:33:24 +0100 FeedCreator 1.7.2 Associated Paper http://www.opensparc.net/publications/presentations/isscc-2008-a-third-generation-65nm-16-core-32-thread-plus-32-scout-thread-cmt.html#comment-104 Hi, Is the first paper referenced available somewhere? G. Konstadinidis, M. Rashid, P. Lai et al., “Third-Generation 16-core 32- Thread CMT SPARC® Processor”, ISSCC Dig. Tech. Papers, pp. AA-BB , Feb. 2008. The ISSCC proceedings are not yet available online, and I'd really like to read this in combination with the paper attached above. - Matt Horsnell Thu, 28 Feb 2008 07:57:11 +0100