byronc bits: Digital Design for Cheapskates

Written by byronc bits

Monday, 12 February 2007

I’m usually a software guy, but I find myself doing more and more digital design these days. One common question I hear get is “What’s a good way for a programmer to get started with digital design?” The good news is that if you get to use an HDL like VHDL or verilog, digital design can be somewhat similar to writing software. Actually writing the HDL code will be the subject of later posts; the point of this post is to help you set up a fairly simple digital design environment using open source software. Please note that this is an area where there are very high quality proprietary tools that you may want to use.

First, we need to decide whether to use VHDL or verilog. These languages look different but the concepts and constructs are very similar so it’s mostly a matter of taste and the tools you have available. In the open source world we have Icarus Verilog for verilog and gHDL for VHDL. After checking the package repository on my Debian box and seeing that gHDL probably isn’t going to make it into the next release it would appear that verilog is the best choice for now. Besides, Sun released the design for the OpenSPARC-T1 as verilog code. We’ll also need a waveform viewer to view simulation results. GTKWave seems to work fairly well with Icarus Verilog.

After installing both of those packages, it’s time to write some code. I wrote a simple D Flip-Flop for demonstration. Since wordpress will probably eat the code if I include it in the post you can download the module and testbench with these links: module: dff.v, testbench: dff_tb.v. Please don’t mock my verilog code too much, I haven’t written any before today.

After downloading the two files you can build them with Icarus Verilog using the command: iverilog -odff dff.v dff_tb.v.

You can now run the simulation:
$ vvp dff VCD info: dumpfile dff.vcd opened for output. d=0, q=x d=0, q=0 d=1, q=0 d=1, q=1 d=0, q=1 d=0, q=0

After running the simulation, you can use GTKWave to examine the internal state:

gtkwave dff.vcd
Add the waves you want to see by clicking on Search->Signal Search Regexp
Use the signal search box to select all the signals in the d_flip_flop instance.
Examine the waveform to make sure the module worked properly.