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Aldec, Inc.- Design Verification

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Aldec, Inc.- Design Verification

Established in 1984, Aldec, Inc. provides highly-integrated solutions for the design engineering community by supporting new methodologies that speed the overall design verification process. The company has developed a world-class simulator that addresses users' requirements for common kernel simulation, in addition to supporting new design verification methodologies that include SystemC, SystemVerilog, Assertions-based Verification (ABV), hardware acceleration and co-verification from a single platform. This focus has allowed Aldec to evolve into one of the best-known names in design verification.

"We are pleased that Sun Microsystems has released their latest OpenSPARC T1 design to the general public" said Stan Hanel, University Program Manager at Aldec. "We believe that Sun's initiative will allow the OpenSPARC community to more easily and inexpensively implement custom logic circuit hardware designs based on the Verilog source code of the OpenSPARC T1. To foster this activity, we will be making Aldec's Riviera Verilog Simulator download available on a 90-day trial basis."

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