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OpenSPARC T2 Released

UltraSPARC T2

UltraSPARC T2 - Click to enlarge

Sun Accelerates Growth of UltraSPARC CMT Ecosystem. Delivering on the commitment it made in August by providing the OpenSPARC T2 RTL (register transfer level) processor design to the free and open source community via the GPL license. The OpenSPARC T2 processor is based on the UltraSPARC T2 processor, the world\'s fastest commodity processor with eight cores and eight threads per core.

Read the press release

Read the OpenSPARC T2 specifications and download the OpenSPARC T2 design RTL ("source code") and architectural and modeling software tools.

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New GCC4SS 4.2 released

CMT Related Books

  • Computer Architecture A Quantitative Approach  
  • Chip Multiprocessor Architecture  
  • Solaris Application Programming  
  • Using OpenMP  

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OpenSPARC T1 Version 1.6 Released

New Features in the Release 1.6 of  OpenSPARC T1

  • T1 core supports single- and four-thread options on FPGAs
  • Reference designs boot OpenSolaris on single- or four-thread mode
  • Xilinx Virtex-5 technology support
  • Networking (ftp, telnet) support

These new features are designed to enable a user to build real systems using the OpenSPARC T1 core. For further details on Xilinx, please refer to the Xilinx University program.

Download it!

 
Community Innovation Awards Contest
Want to Win a $20K award? How about an additional Grand Prize Award of $35K? Read on and get your entries in by June 30th!

The OpenSPARC Community Innovation Awards Contest is part of Sun's $1 Million Open Source Community Innovation Awards Program, and will be responsible for awarding $175,000 of the $1 Million total prize. The OpenSPARC Contest awards categories and award amounts are as follows:

OpenSPARC Contest categories and award amounts:

  • A. Grand Prize: $35,000
  • B. First Prizes: ($20,000 each category)
    • i.Best University level Lab Project based on OpenSPARC:
    • ii. Best University level Computer Architecture and/or VLSI course
    • iii. Best Architecture White paper or Application Notes
    • iv. Best New Bus Interface creation as a contribution to the OpenSPARC community
    • v. Best Demo of an application running on an FPGA
    • vi. Best Adaptation of a single-thread application to a multi-thread CMT (Chip Multi Threaded) environment
    • vii. Best submission that makes a substantial contribution to the OpenSPARC community and does not constitute any of the above described Categories

The Grand Prize winner will also be the First Prize Winner in the Category for which the Entry was submitted.

The OpenSPARC Contest will be judged by the OpenSPARC Contest Jury Panel, a group of OpenSPARC industry experts selected from within the OpenSPARC community representing a diverse background of expertise and experience.

Read the complete contest rules.

 
ERC Highlights - Dr. James Hoe

Excerpts from Education and Research Conference 2008, Dr. James Hoe's highlights from the Panel Discussion at the ERC. (7:27)

 

 
OpenSPARC Centers of Excellence

Seven major universities are now official OpenSPARC Technology Centers of Excellence:

  • University of California, Santa Cruz
  • University of Texas, Austin
  • University of Michigan, Ann Arbor
  • University of Illinois, Urbana-Champaign
  • Carnegie Mellon University
  • Stanford University
  • University of Otago, Dunedin, New Zealand

Each Center of Excellence has a minimum two-year commitment, during which time they'll execute chip design research and course work based on Sun's chip multi-threading (CMT) design.

Visit our Centers of Excellence web page.

 
OpenSPARC Course Material

Collaborate and share course material related to OpenSPARC, chip multi-threading, multi-core in many areas including hardware design, design tools, CMT Architecture, software systems design, operating systems, concurrent computing and other related areas.  We're looking for professors who have a passion for teaching and contributing to their field of study by sharing their course material with others.

Take a look at site we are developing and the course materials already available:
http://wiki.opensparc.net/bin/view.pl/CourseMaterial.

We thankful for the support and generosity of professors who choose to share their research, pedagogy, and knowledge to benefit others.

 

What's New

China Universities Join OpenSPARC

Sun Microsystems, Inc. and the Ministry of Education (MOE) for the People's Republic of China announced a three-year collaboration agreement designed to meet China's demand for cultivating integrat...
Read More ... [OpenSPARC Course Material]

OpenSPARC Workshop in Brazil at University of San Paolo

University of Sao Paulo (USP), Brazil conducted an OpenSPARC workshop on March 24-26. Some notes from the first day of the workshop below. http://www.pad.lsi.usp.br/joomla/index.php?option=c...
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FPGA Tutorial

2/5/08: The presentation is a Tutorial on using OpenSPARC T1 in an FPGA, “OpenSPARC T1 FPGA Implementation” ...
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MICRO-40: Introduction to OpenSPARC

12/1/07: Tutorial presented at MICRO-40 on December 1-5, 2007, Introduction to OpenSPARC ...
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Paper presented at A-SSCC 2007

12/6/07: Paper presented at A-SSCC 2007 on November 12-14, 2007, UltraSPARC T2: A Highly-Threaded, Power-Efficient, SPARC SOC ...
Read More ...

Latest News

ITJungle: Sun Plans to Scale T2+ Servers to Four Sockets, Maybe More

Last week, Sun Microsystems began shipments of its first two-socket variants of its "Niagara" family of servers, marking a new phase in scalability for its multicore Sparc server product ...
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eASIC Shatters FPGA Performance With 235MHz LEON3 Processor

eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced the immediate availability of Gaisler Research’s LEON3 SPARC Soft Processor. eASIC and Gaisler Research mi...
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GreenerComputing: Sun Debuts New Eco Services

Sun Microsystems launched its Eco Advantage Program to help its partners green their IT practices. The program is part of the company's Eco Innovation initiatives unveiled last year to help custom...
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Sun And Wind River Partner To Deliver Carrier Grade Linux

Sun Microsystems, Inc. and Wind River Systems, Inc. today announced that Wind River will port its Carrier Grade Linux (CGL) and Workbench development suite to Sun's UltraSPARC T2 chip multithreading...
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ITJungle: Sun Gangs Up Sparc T2+ Chips with Maramba Servers

There is still enough competition in the Unix space to make vendors hate to see each other get the limelight. Which is one of the reasons why Sun Microsystems has timed the launch of its "Vic...
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Latest Blogs

Paul Murphy: The obligatory ‘Victoria Falls’ post

For those who don’t know, Sun’s new T2+ machines extend the T2’s CMT capabilities across multiple units to produce 16 and 32 core SMP machines capable of handling 128 and 256 concurrent threads re...
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Eric Pugh: FOSE is the Federal Open Source Expo?

FOSE means: “Free/Open Source Expo” - Scott McNealy, Chairman of Sun Microsystems “Federal Open Source Expo” - Eric Pugh, Principal of OpenSource Connections When the chairman of a company that...
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Marcelo Vitor Moretti Arbore: OpenSPARC Workshop

This is my first entry, and what better way to start, than with a great event. Last week here at Sao Paulo occurred a tree day workshop that had as subject openSPARC specification and FPGA impl...
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Darryl Gove: The much maligned -fast

The compiler flag -fast gets an unfair rap. Even the compiler reports: cc: Warning: -xarch=native has been explicitly specified, or implicitly specified by a macro option, -xarch=native on th...
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Darryl Gove: Performance tuning recipe

Dan Berger posted a comment about the compiler flags we'd used for Ruby. Basically, we've not done compiler flag tuning yet, so I'll write a quick outline of the first steps in tuning an application. ...
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